Invention Grant
US09530488B1 Methods, apparatus and system determining dual port DC contention margin
有权
方法，设备和系统确定双端口DC争用余量
- Patent Title: Methods, apparatus and system determining dual port DC contention margin
- Patent Title (中): 方法，设备和系统确定双端口DC争用余量
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Application No.: US15048583Application Date: 2016-02-19
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Publication No.: US09530488B1Publication Date: 2016-12-27
- Inventor: Sriram Balasubramanian , Vivek Joshi , Randy W. Mann , Ratheesh Ramachandran Thankalekshmi
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: G11C29/50
- IPC: G11C29/50 ; G11C11/419 ; G11C29/44
Abstract:
At least one method, apparatus and system disclosed involves testing a dual port memory cell in a memory device. A semiconductor wafer is processed for providing a dual port memory device. An inline DC contention margin test is performed for testing a contention margin related to a write operation into a cell of the memory device. A determination is made as to whether the contention margin is within a predetermined range. A responsive action is performed in response to determining that the contention margin is outside the predetermined range.
Information query
