Invention Grant
- Patent Title: Method for fabricating contact plug in an interlayer dielectric layer
- Patent Title (中): 在层间电介质层中制造接触塞的方法
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Application No.: US14612235Application Date: 2015-02-02
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Publication No.: US09548239B2Publication Date: 2017-01-17
- Inventor: Chia-Lin Lu , Chun-Lung Chen , Feng-Yi Chang , Ching-Wen Hung , Jia-Rong Wu , Yi-Hui Lee , Yi-Kuan Wu , Ying-Cheng Liu , Chih-Sen Huang , Yi-Wei Chen
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/768
Abstract:
A gate structure is first formed on a substrate and an interlayer dielectric (ILD) layer is formed around the gate structure, a dielectric layer is formed on the ILD layer and the gate structure, an opening is formed in the dielectric layer and the ILD layer, and an organic dielectric layer (ODL) is formed on the dielectric layer and in the opening. After removing part of the ODL, part of the dielectric layer to extend the opening, and then the remaining ODL, a contact plug is formed in the opening.
Public/Granted literature
- US20160225662A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2016-08-04
Information query
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