Technologies are described herein for improving performance and energy efficiency in a computing system while using a large memory page size. Some example technologies may configure a main memory of the computing system to include a page-to-chunk table and a data area. The page-to-chunk table may include multiple entries such as a first entry. The first entry may correspond to a page that is made up of multiple chunks. The first entry may include pointers to the multiple chunks stored in the data area.