Invention Grant
US09557797B2 Algorithm for preferred core sequencing to maximize performance and reduce chip temperature and power
有权
优化核心测序的算法可最大限度地提高性能并降低芯片的温度和功率
- Patent Title: Algorithm for preferred core sequencing to maximize performance and reduce chip temperature and power
- Patent Title (中): 优化核心测序的算法可最大限度地提高性能并降低芯片的温度和功率
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Application No.: US14319393Application Date: 2014-06-30
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Publication No.: US09557797B2Publication Date: 2017-01-31
- Inventor: Rajat Mittal , Mehdi Saeidi , Tao Xue , Ronald Frank Alton , Rajit Chandra , Sachin Dasnurkar
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: The Marbury Law Group, PLLC
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F9/50

Abstract:
Aspects include computing devices, systems, and methods for selecting preferred processor core combinations for a state of a computing device. In an aspect, a state of a computing device containing the multi-core processor may be determined. A number of current leakage ratios may be determined by comparing current leakages of the processor cores to current leakages of the other processor cores. The ratios may be compared to boundaries for the state of the computing device in respective inequalities. A processor core associated with a number of boundaries may be selected in response to determining that the respective inequalities are true. The boundaries may be associated with a set of processor cores deemed preferred for an associated state of the computing device. The processor core present in the set of processor cores for each boundary of a true inequality may be the selected processor core.
Public/Granted literature
- US20150338902A1 Algorithm For Preferred Core Sequencing To Maximize Performance And Reduce Chip Temperature And Power Public/Granted day:2015-11-26
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