Invention Grant
- Patent Title: Testing fuse configurations in semiconductor devices
- Patent Title (中): 测试半导体器件中的保险丝配置
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Application No.: US14250191Application Date: 2014-04-10
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Publication No.: US09568544B2Publication Date: 2017-02-14
- Inventor: Adrian E. Ong , Paul Fuller , Nick van Heel , Mark Thomann
- Applicant: RAMBUS INC.
- Applicant Address: US CA Sunnyvale
- Assignee: RAMBUS INC.
- Current Assignee: RAMBUS INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Lowenstein Sandler LLP
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/28 ; G01R31/317

Abstract:
A system includes a first integrated circuit configured to operate in at least a normal mode and a test mode and a second integrated circuit, where both the first integrated circuit and the second integrated circuit are disposed within a same semiconductor device package. The system further includes a first terminal, external to the semiconductor device package, electronically coupled to the first integrated circuit and the second integrated circuit. The first terminal is electronically coupled to a buffer in the second integrated circuit and used to convey signals to or from the first integrated circuit.
Public/Granted literature
- US20140333341A1 TESTING FUSE CONFIGURATIONS IN SEMICONDUCTOR DEVICES Public/Granted day:2014-11-13
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