Invention Grant
- Patent Title: Wafer level fan-out with electromagnetic shielding
- Patent Title (中): 晶圆级扇形电磁屏蔽
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Application No.: US15080001Application Date: 2016-03-24
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Publication No.: US09570406B2Publication Date: 2017-02-14
- Inventor: Thong Dang , Dan Carey , Ma Shirley Asoy
- Applicant: RF Micro Devices, Inc.
- Applicant Address: US NC Greensboro
- Assignee: Qorvo US, Inc.
- Current Assignee: Qorvo US, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L23/552 ; H01L23/31 ; H01L21/768 ; H01L21/3105 ; H01L21/268 ; H01L21/683 ; H01L21/56 ; H01L21/3205 ; H01L25/00 ; H01L25/065 ; H01L21/48
Abstract:
The present disclosure integrates electromagnetic shielding into a wafer level fan-out packaging process. First, a mold wafer having multiple modules is provided. Each module includes a die with an I/O port and is surrounded by an inter-module area. A redistribution structure that includes a shield connected element coupled to the I/O port of each module is formed over a bottom surface of the mold wafer. The shield connected element extends laterally from the I/O port into the inter-module area for each module. Next, the mold wafer is sub-diced at each inter-module area to create a cavity. A portion of the shield connected element is then exposed through the bottom of each cavity. A shielding structure is formed over a top surface of the mold wafer and exposed faces of each cavity. The shielding structure is in contact with the shield connected element.
Public/Granted literature
- US20160351509A1 WAFER LEVEL FAN-OUT WITH ELECTROMAGNETIC SHIELDING Public/Granted day:2016-12-01
Information query
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