Invention Grant
- Patent Title: Wiring substrate and method of manufacturing wiring substrate
- Patent Title (中): 接线基板及制造布线基板的方法
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Application No.: US14444135Application Date: 2014-07-28
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Publication No.: US09572252B2Publication Date: 2017-02-14
- Inventor: Tetsuyuki Tsuchida , Toshikazu Okubo , Ikuo Shohji , Takahiro Kano
- Applicant: TOPPAN PRINTING CO., LTD. , NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
- Applicant Address: JP Tokyo JP Maebashi
- Assignee: TOPPAN PRINTING CO., LTD.,NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
- Current Assignee: TOPPAN PRINTING CO., LTD.,NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
- Current Assignee Address: JP Tokyo JP Maebashi
- Priority: JP2012-017261 20120130
- Main IPC: B05D5/12
- IPC: B05D5/12 ; B28B19/00 ; C23C18/00 ; H01C17/06 ; H05K3/00 ; H05K1/09 ; C23C18/36 ; C23C18/44 ; C23C18/16 ; H05K3/24 ; C23C18/50

Abstract:
A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.
Public/Granted literature
- US20140332259A1 WIRING SUBSTRATE AND METHOD OF MANUFACTURING WIRING SUBSTRATE Public/Granted day:2014-11-13
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