Invention Grant
US09577075B2 Method of manufacturing semiconductor device using plasma doping process and semiconductor device manufactured by the method
有权
使用等离子体掺杂工艺制造半导体器件的方法和通过该方法制造的半导体器件
- Patent Title: Method of manufacturing semiconductor device using plasma doping process and semiconductor device manufactured by the method
- Patent Title (中): 使用等离子体掺杂工艺制造半导体器件的方法和通过该方法制造的半导体器件
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Application No.: US14460404Application Date: 2014-08-15
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Publication No.: US09577075B2Publication Date: 2017-02-21
- Inventor: Kyungin Choi , Sunghyun Choi , Yong-Suk Tak , Bonyoung Koo , Jaejong Han
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2013-0138426 20131114
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L21/223 ; H01L29/78 ; H01L21/8234 ; H01L21/84

Abstract:
A method of manufacturing a semiconductor device includes forming a preliminary fin-type active pattern extending in a first direction, forming a device isolation pattern covering a lower portion of the preliminary fin-type active pattern, forming a gate structure extending in a second direction and crossing over the preliminary fin-type active pattern, forming a fin-type active pattern having a first region and a second region, forming a preliminary impurity-doped pattern on the second region by using a selective epitaxial-growth process, and forming an impurity-doped pattern by injecting impurities using a plasma doping process, wherein the upper surface of the first region is at a first level and the upper surface of the second region is at a second level lower than the first level.
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