Invention Grant
- Patent Title: Low temperature cure modulus enhancement
- Patent Title (中): 低温固化模量提高
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Application No.: US14590624Application Date: 2015-01-06
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Publication No.: US09583332B2Publication Date: 2017-02-28
- Inventor: Pramit Manna , Kiran V. Thadani , Abhijit Basu Mallick
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/469 ; H01L21/02 ; H01L21/687 ; C23C16/40 ; C23C16/56 ; H01J37/32

Abstract:
Implementations described herein generally relate to methods for dielectric gap-fill. In one implementation, a method of depositing a silicon oxide layer on a substrate is provided. The method comprises introducing a cyclic organic siloxane precursor and an aliphatic organic siloxane precursor into a deposition chamber, reacting the cyclic organic siloxane precursor and the aliphatic organic siloxane precursor with atomic oxygen to form the silicon oxide layer on a substrate positioned in the deposition chamber, wherein the substrate is maintained at a temperature between about 0° C. and about 200° C. as the silicon oxide layer is formed, wherein the silicon oxide layer is initially flowable following deposition, and wherein a ratio of a flow rate of the cyclic organic siloxane precursor to a flow rate of the aliphatic organic siloxane precursor is at least 2:1 and curing the deposited silicon oxide layer.
Public/Granted literature
- US20150214039A1 LOW TEMPERATURE CURE MODULUS ENHANCEMENT Public/Granted day:2015-07-30
Information query
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