发明授权
- 专利标题: CMOS nanowire structure
- 专利标题(中): CMOS纳米线结构
-
申请号: US14948083申请日: 2015-11-20
-
公开(公告)号: US09583491B2公开(公告)日: 2017-02-28
- 发明人: Seiyon Kim , Kelin J. Kuhn , Tahir Ghani , Anand S. Murthy , Annalisa Cappellani , Stephen M. Cea , Rafael Rios , Glenn A. Glass
- 申请人: Seiyon Kim , Kelin J. Kuhn , Tahir Ghani , Anand S. Murthy , Annalisa Cappellani , Stephen M. Cea , Rafael Rios , Glenn A. Glass
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L27/092
- IPC分类号: H01L27/092 ; H01L21/8238 ; H01L27/12 ; H01L29/06 ; B82Y10/00 ; H01L29/66 ; H01L29/775 ; H01L21/84 ; H01L29/423 ; H01L29/10
摘要:
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.
公开/授权文献
- US20160086951A1 CMOS NANOWIRE STRUCTURE 公开/授权日:2016-03-24
信息查询
IPC分类: