A semiconductor memory device includes a memory string including a first cells portion and a second cells portion each including a multiple of memory cells, the second cells portion being disposed over the first cells portion, and a control logic configured to control a peripheral circuit such that each of at least two memory cells in a top of the first cells portion and each of at least two memory cells in a bottom of the second cells portion is programmed to have a smaller data bit than remaining memory cells in the first and second cells portions.