Invention Grant
US09589854B2 Alignment monitoring structure and alignment monitoring method for semiconductor devices 有权
半导体器件的对准监测结构和对准监测方法

Alignment monitoring structure and alignment monitoring method for semiconductor devices
Abstract:
The present disclosure provides in various aspects an alignment monitoring structure and method for monitoring the alignment between a target gate conductor and the corresponding target contact in a semiconductor device, for example, in a CMOS. In accordance with some illustrative embodiments herein, a structure with a plurality of gate conductors disposed over the substrate so as to define a row of parallel gate conductors and a plurality of first contacts is provided, wherein each of the first contacts is disposed between two adjacent gate conductors so as to define a first lateral distance between a first gate conductor and the first contact and a second lateral distance between the first contact and a second gate conductor, and wherein the first lateral distance and the second lateral distance vary systematically along the row of parallel gate conductors.
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