Invention Grant
- Patent Title: Semiconductor package having stacked semiconductor chips
- Patent Title (中): 具有层叠半导体芯片的半导体封装
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Application No.: US14804880Application Date: 2015-07-21
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Publication No.: US09589945B2Publication Date: 2017-03-07
- Inventor: Cha-jea Jo , Yun-hyeok Im , Tae-je Cho
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2014-0130335 20140929
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L23/367 ; H01L23/48 ; H01L25/065 ; H01L23/36 ; H01L23/427 ; H01L23/532 ; H01L23/31

Abstract:
A semiconductor package includes a package base substrate, at least one first semiconductor chip disposed on the package base substrate, and at least one stacked semiconductor chip structure disposed on the package base substrate adjacent to the at least one first semiconductor chip. The at least one stacked semiconductor chip includes a plurality of second semiconductor chips. A penetrating electrode region including a plurality of penetrating electrodes is disposed adjacent to an edge of the at least one stacked semiconductor chip structure.
Public/Granted literature
- US20160093598A1 SEMICONDUCTOR PACKAGE HAVING STACKED SEMICONDUCTOR CHIPS Public/Granted day:2016-03-31
Information query
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