Invention Grant
- Patent Title: Compensated well ESD diodes with reduced capacitance
- Patent Title (中): 补偿良好的ESD二极管，降低电容
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Application No.: US14497601Application Date: 2014-09-26
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Publication No.: US09589959B2Publication Date: 2017-03-07
- Inventor: Mahalingam Nandakumar , Sunitha Venkataraman , David L. Catlett, Jr.
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/62
- IPC: H01L23/62 ; H01L27/092 ; H01L27/06 ; H01L27/08 ; H01L27/02 ; H01L29/06
Abstract:
An integrated circuit with a shallow trench isolated, low capacitance, ESD protection diode. An integrated circuit with a gate space isolated, low capacitance, ESD protection diode. An integrated circuit with a gate space isolated, low capacitance, ESD protection diode in parallel with a shallow trench isolated, low capacitance, ESD protection diode.
Public/Granted literature
- US20150008523A1 COMPENSATED WELL ESD DIODES WITH REDUCED CAPACITANCE Public/Granted day:2015-01-08
Information query
IPC分类:
