A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.