Invention Grant
- Patent Title: Fault resistant flip-flop
- Patent Title (中): 防故障触发器
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Application No.: US14863369Application Date: 2015-09-23
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Publication No.: US09590598B2Publication Date: 2017-03-07
- Inventor: Vibhu Sharma , Ralf Malzahn
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP14185964 20140923
- Main IPC: H03K3/037
- IPC: H03K3/037 ; H03K3/3562 ; H03K3/011
Abstract:
A flip-flop (10) is disclosed comprising a slave latch (30) and a master latch (20). Each of the slave and master latch comprise a pair of cross-coupled logic gates (21, 22, 31, 32). A cross coupling connection of the slave or master latch (30, 20) comprises a resistive element (8, 9, 11, 12) arranged to reduce the sensitivity of the flip-flop (10) to a current injection.
Public/Granted literature
- US20160087611A1 FAULT RESISTANT FLIP-FLOP Public/Granted day:2016-03-24
Information query
IPC分类:
