A MOSFET may be formed with a strain-inducing mismatch of lattice constants that improves carrier mobility. In exemplary embodiments a MOSFET includes a strain-inducing lattice constant mismatch that is not undermined by a recessing step. In some embodiments a source/drain pattern is grown without a recessing step, thereby avoiding problems associated with a recessing step. Alternatively, a recessing process may be performed in a way that does not expose top surfaces of a strain-relaxed buffer layer. A MOSFET device layer, such as a strain-relaxed buffer layer or a device isolation layer, is unaffected by a recessing step and, as a result, strain may be applied to a channel region without jeopardizing subsequent formation steps.