Invention Grant
- Patent Title: Methods, apparatus and system for voltage ramp testing
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Application No.: US14553863Application Date: 2014-11-25
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Publication No.: US09599656B2Publication Date: 2017-03-21
- Inventor: Suresh Uppal , Andreas Kerber , William McMahon , Eduard A. Cartier
- Applicant: GLOBALFOUNDRIES INC. , International Business Machines Corporation
- Applicant Address: KY Grand Cayman US NY Armonk
- Assignee: GLOBALFOUNDRIES INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: GLOBALFOUNDRIES INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: KY Grand Cayman US NY Armonk
- Agency: Williams Morgan, P.C.
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R31/14 ; G01R31/28

Abstract:
At least one method and system disclosed herein involves testing of integrated circuits. A device having at least one transistor and at least one dielectric layer is provided. A first voltage is provided during a first time period for performing a stress test upon the device. A second voltage is provided during a second time period for discharging at least a portion of the charge built-up as a result of the first voltage. The second voltage is of an opposite polarity of the first voltage. A sense function is provided during a third time period for determining a result of the stress test. Data relating to a breakdown of the dielectric layer based upon the result of the stress test is acquired, stored and/or transmitted.
Public/Granted literature
- US20160146879A1 METHODS, APPARATUS AND SYSTEM FOR VOLTAGE RAMP TESTING Public/Granted day:2016-05-26
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