Invention Grant
- Patent Title: Common platform for one-level memory architecture and two-level memory architecture
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Application No.: US14140261Application Date: 2013-12-24
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Publication No.: US09600413B2Publication Date: 2017-03-21
- Inventor: Joydeep Ray , Varghese George , Inder M. Sodhi , Jeffrey R. Wilcox
- Applicant: Joydeep Ray , Varghese George , Inder M. Sodhi , Jeffrey R. Wilcox
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/06 ; G06F12/02 ; G11C5/04

Abstract:
Technologies for one-level memory (1LM) and two-level memory (2LM) configurations in a common platform are described. A processor includes a first memory interface coupled to a first memory device that is located off-package of the processor and a second memory interface coupled to a second memory device that is located off-package of the processor. The processor also includes a multi-level memory controller (MLMC) coupled to the first memory interface and the second memory interface. The MLMC includes a first configuration and a second configuration. The first memory device is a random access memory (RAM) of a one-level memory (1LM) architecture in the first configuration. The first memory device is a first-level RAM of a two-level memory (2LM) architecture in the second configuration and the second memory device is a second-level non-volatile memory (NVM) of the 2LM architecture in the second configuration.
Public/Granted literature
- US20150178204A1 COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEMORY ARCHITECTURE Public/Granted day:2015-06-25
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