Invention Grant
- Patent Title: Scan flip-flop circuit with dedicated clocks
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Application No.: US14716215Application Date: 2015-05-19
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Publication No.: US09606177B2Publication Date: 2017-03-28
- Inventor: Daniel W. Bailey , Abhishek Sharma , Michael Q. Co
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Polansky & Associates, P.L.L.C.
- Agent Paul J. Polansky
- Main IPC: H03K3/00
- IPC: H03K3/00 ; G01R31/3177 ; G01R31/317

Abstract:
In one form, a scan flip-flop includes a clock gating cell and a dedicated clock flip-flop. The clock gating cell provides an input clock input signal as a scan clock signal when a scan shift enable signal is active, and provides the input clock signal as a data clock signal when the scan shift enable signal is inactive. The dedicated clock flip-flop stores a data input signal and provides the data input signal, so stored, as a data output signal in response to transitions of the data clock signal, and stores a scan data input signal and provides the scan data input signal, so stored, as the data output signal in response to transitions of the scan clock signal. The clock gating cell may further provide the input clock signal as the data clock signal when both a scan shift enable signal is inactive and a data enable signal is active.
Public/Granted literature
- US20160341793A1 SCAN FLIP-FLOP CIRCUIT WITH DEDICATED CLOCKS Public/Granted day:2016-11-24
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