Invention Grant
- Patent Title: High-voltage tolerant input voltage buffer circuit
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Application No.: US14129238Application Date: 2013-09-24
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Publication No.: US09608636B2Publication Date: 2017-03-28
- Inventor: Ker Yon Lau
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- International Application: PCT/US2013/061491 WO 20130924
- International Announcement: WO2015/047230 WO 20150402
- Main IPC: H03K19/0185
- IPC: H03K19/0185 ; H03K19/003 ; H03K19/0175 ; H03K5/08 ; G06F1/26 ; H03K17/16

Abstract:
Described is an apparatus comprising a first node to receive signal; a second node to provide an output signal; a voltage limiter circuit operating under a first supply voltage, the voltage limiter coupled to the first and the second nodes; and a bypass circuit operating under the first supply voltage, the bypass circuit coupled to the voltage limiter circuit and is capable of being enabled to electrically short the first node to the second node.
Public/Granted literature
- US20160197613A1 HIGH-VOLTAGE TOLERANT INPUT VOLTAGE BUFFER CIRCUIT Public/Granted day:2016-07-07
Information query
IPC分类: