Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US14714667Application Date: 2015-05-18
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Publication No.: US09646895B2Publication Date: 2017-05-09
- Inventor: Seungduk Baek , Ji Hwang Kim , Taeje Cho
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2014-0131591 20140930
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/26 ; H01L23/00 ; H01L23/525

Abstract:
A method of manufacturing a semiconductor package includes providing a semiconductor chip including a circuit pattern, a connection pad, a first test pad and a second test pad, each of the connection pad, the first test pad and the second test pad respectively electrically connected to the circuit pattern, evaluating electrical characteristics of the semiconductor chip by applying a first test voltage to the first test pad and a second test voltage to the second test pad, the second test voltage being higher than the first test voltage, and electrically disconnecting the second test pad from the circuit pattern.
Public/Granted literature
- US20160093541A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2016-03-31
Information query
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