Invention Grant
- Patent Title: Middle-of-line integration methods and semiconductor devices
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Application No.: US14622516Application Date: 2015-02-13
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Publication No.: US09653399B2Publication Date: 2017-05-16
- Inventor: John Jianhong Zhu , Da Yang , Jeffrey Junhao Xu , Stanley Seungchul Song , Kern Rim
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Toler Law Group, PC
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/532 ; H01L21/8238 ; H01L21/02 ; H01L21/311 ; H01L21/768 ; H01L23/528 ; H01L23/535 ; H01L23/522
Abstract:
An electronic device includes a middle-of-line (MOL) stack. The electronic device includes a top local interconnect layer and a contact coupling the top local interconnect layer to a gate of a semiconductor device through a first dielectric layer. The electronic device also includes one or more isolation walls between the contact and the first dielectric layer, wherein the one or more isolation walls include aluminum nitride (AlN).
Public/Granted literature
- US20160240485A1 MIDDLE-OF-LINE INTEGRATION METHODS AND SEMICONDUCTOR DEVICES Public/Granted day:2016-08-18
Information query
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