Invention Grant
- Patent Title: Performance-driven and gradient-aware dummy insertion for gradient-sensitive array
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Application No.: US14638065Application Date: 2015-03-04
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Publication No.: US09659920B2Publication Date: 2017-05-23
- Inventor: Mu-Jen Huang , Hsiao-Hui Chen , Cheok-Kei Lei , Po-Tsun Chen , Yu-Sian Jiang
- Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50 ; H01L27/02 ; G03F1/00 ; H01L27/118

Abstract:
The present disclosure relates to an arrangement and a method of performance-aware buffer zone placement for a high-density array of unit cells. A first feature density of the array is measured and maximum variation for a parameter within a unit cell is determined. A look-up table of silicon data is consulted to predict a buffer zone width and gradient value that achieves a variation that is less than the maximum variation for the unit cell. The look-up table contains a suite of silicon test cases of various array and buffer zone geometries, wherein variation of the parameter within a respective test structure is measured and cataloged for the various buffer zone geometries, and is also extrapolated from the suite of silicon test cases. A buffer zone is placed at the border of the array with a width that is less than or equal to the buffer zone width.
Public/Granted literature
- US20150179627A1 PERFORMANCE-DRIVEN AND GRADIENT-AWARE DUMMY INSERTION FOR GRADIENT-SENSITIVE ARRAY Public/Granted day:2015-06-25
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