Invention Grant
- Patent Title: Psuedo resistor circuit and charge amplifier
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Application No.: US14870651Application Date: 2015-09-30
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Publication No.: US09660592B2Publication Date: 2017-05-23
- Inventor: Yasuhide Takase
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Nagaokakyo-Shi, Kyoto-Fu
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Nagaokakyo-Shi, Kyoto-Fu
- Agency: Arent Fox LLP
- Priority: JP2013-076986 20130402
- Main IPC: G01R29/24
- IPC: G01R29/24 ; H03F1/30 ; H03F3/70 ; H03K17/687

Abstract:
A pseudo resistor circuit and a charge amplifier include a first field effect transistor; a second field effect transistor having electrical characteristics matched with electrical characteristics of the first field effect transistor; and a voltage dividing circuit with terminal of a reference resistor electrically connected to a source terminal of the second field effect transistor. Further, a first operational amplifier with an output terminal is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into either an inverting or non-inverting input terminal and reference voltage is input into the other of the inverting and non-inverting input terminal. Furthermore, a second operational amplifier supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the resistor.
Public/Granted literature
- US20160020734A1 PSUEDO RESISTOR CIRCUIT AND CHARGE AMPLIFIER Public/Granted day:2016-01-21
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