Invention Grant
- Patent Title: Translation buffer unit management
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Application No.: US14790019Application Date: 2015-07-02
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Publication No.: US09672159B2Publication Date: 2017-06-06
- Inventor: Andrew Brookfield Swaine , Viswanath Chakrala
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G06F12/1027
- IPC: G06F12/1027

Abstract:
A data processing system 2 incorporates a translation buffer unit 24, 26, 28 and a translation control unit 30. The translation buffer unit responds to receipt of a memory access transaction for which translation data is unavailable in that translation buffer unit by issuing a request to the translation control unit to provide translation data for the memory access transaction. The translation control unit is responsive to disabling or enabling of address translation for a given type of memory access transaction to an issue invalidate command to all translation buffer units which may be holding translation data for that given type of memory access transaction. When the translation control unit receives a request for translation from the translation buffer unit for a memory access of the given type for which memory address translation is disabled, then the translation control unit responds to returning global translation data to be used by the translation buffer for all memory access translations of that given type.
Public/Granted literature
- US20170004091A1 TRANSLATION BUFFER UNIT MANAGEMENT Public/Granted day:2017-01-05
Information query
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