- 专利标题: Pillar-shaped semiconductor device and method for producing the same
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申请号: US14806053申请日: 2015-07-22
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公开(公告)号: US09673321B2公开(公告)日: 2017-06-06
- 发明人: Fujio Masuoka , Nozomu Harada
- 申请人: Unisantis Electronics Singapore Pte. Ltd.
- 申请人地址: SG Singapore
- 专利权人: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- 当前专利权人: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- 当前专利权人地址: SG Singapore
- 代理机构: Brinks Gilson & Lione
- 优先权: WOPCT/JP2014/081455 20141127
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/225 ; H01L21/24 ; H01L21/265 ; H01L21/768 ; H01L21/8234 ; H01L29/08 ; H01L29/10 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L21/285
摘要:
An opening extending through a gate insulating layer and a gate conductor layer is formed in the circumferential portion of a Si pillar at an intermediate height of the Si pillar. A laminated structure including two sets each including a Ni film, a poly-Si layer containing donor or acceptor impurity atoms, and a SiO2 layer is formed so as to surround the opening. A heat treatment is carried out to form silicide from the poly-Si layers and this silicide formation causes the resultant NiSi layers to protrude and come into contact with the side surface of the Si pillar. The donor or acceptor impurity atoms diffuse from the NiSi layers into the Si pillar to thereby form an N+ region and a P+ region serving as a source or a drain of SGTs.