Invention Grant
- Patent Title: P-Si TFT and method for fabricating the same, array substrate and method for fabricating the same, and display device
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Application No.: US15122066Application Date: 2016-02-22
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Publication No.: US09673333B2Publication Date: 2017-06-06
- Inventor: Zheng Liu , Xiaoyong Lu , Xiaolong Li , Yu-Cheng Chan
- Applicant: BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Beijing
- Assignee: BOE Technology Group Co., Ltd.
- Current Assignee: BOE Technology Group Co., Ltd.
- Current Assignee Address: CN Beijing
- Agency: Armstrong Teasdale LLP
- Priority: CN201510116969 20150317
- International Application: PCT/CN2016/074211 WO 20160222
- International Announcement: WO2016/145967 WO 20160922
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/02 ; H01L27/12

Abstract:
A method for fabricating a Polysilicon Thin-Film Transistor is provided. The method includes forming a polysilicon active layer, forming a first gate insulation layer and a first gate electrode sequentially on the active layer, conducting a first ion implantation process on the active layer by using the first gate electrode as a mask to form two doped regions at ends of the active layer, forming a second gate insulation layer and a second gate electrode sequentially on the first gate insulation layer and the first gate electrode, and conducting a second ion implantation process on the active layer by using the second gate electrode as another mask to form two source/drain implantation regions at two outer sides of the doped regions of the active layer. Accordingly, impurity concentration of the two doped regions is smaller than that of the two source/drain implantation regions.
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