Systems, apparatuses, and methods for performing common mode extraction for data communication are disclosed. A circuit is configured to receive a single-ended data signal on a first input port and couple the data signal to a positive input terminal of a receiver component. The circuit is also configured to receive a differential clock signal on second and third input ports and generate a reference signal from the differential clock signal. In one embodiment, the reference signal is generated from an average of the differential clock signal. The circuit is configured to couple the reference signal to a negative input terminal of the receiver component. In one embodiment, the receiver component is an amplifier.