Invention Grant
- Patent Title: Check procedure for floating point operations
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Application No.: US14328753Application Date: 2014-07-11
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Publication No.: US09678714B2Publication Date: 2017-06-13
- Inventor: Manouk Manoukian , Leonard Rarick
- Applicant: Imagination Technologies Limited
- Applicant Address: GB Kings Langley
- Assignee: Imagination Technologies Limited
- Current Assignee: Imagination Technologies Limited
- Current Assignee Address: GB Kings Langley
- Agency: Vorys, Sater, Seymour and Pease LLP
- Agent Vincent M DeLuca
- Main IPC: G06F7/483
- IPC: G06F7/483 ; G06F7/499 ; G06F7/535 ; G06F7/552

Abstract:
Method and computer system for implementing an operation on ≧1 floating point input, in accordance with a rounding mode, e.g. using a Newton-Raphson technique. The floating point result comprises a p-bit mantissa. An unrounded proposed mantissa result is determined using the Newton-Raphson technique, wherein a p-bit rounded proposed mantissa result, t, corresponds to a rounding of the unrounded proposed mantissa result in accordance with the rounding mode, with k leading zeroes. If an increment to the (m−k)th bit of the unrounded result would affect the p-bit rounded result then the input(s) and bits of the unrounded result are used to determine a check parameter which is indicative of a relationship between an exact result and the unrounded result if the (m−k)th bit were incremented. The p-bit mantissa of the floating point result, is determined in dependence upon the check parameter, to be either t or t+1.
Public/Granted literature
- US20160011855A1 CHECK PROCEDURE FOR FLOATING POINT OPERATIONS Public/Granted day:2016-01-14
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