Invention Grant
- Patent Title: Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in Fo-WLCSP
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Application No.: US13845542Application Date: 2013-03-18
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Publication No.: US09679824B2Publication Date: 2017-06-13
- Inventor: Reza A. Pagaila , Rajendra D. Pendse , Jun Mo Koo
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/28 ; H01L21/56 ; H01L23/00 ; H01L23/31

Abstract:
A semiconductor die has a conductive layer including a plurality of trace lines formed over a carrier. The conductive layer includes a plurality of contact pads electrically continuous with the trace lines. A semiconductor die has a plurality of contact pads and bumps formed over the contact pads. A plurality of conductive pillars can be formed over the contact pads of the semiconductor die. The bumps are formed over the conductive pillars. The semiconductor die is mounted to the conductive layer with the bumps directly bonded to an end portion of the trace lines to provide a fine pitch interconnect. An encapsulant is deposited over the semiconductor die and conductive layer. The conductive layer contains wettable material to reduce die shifting during encapsulation. The carrier is removed. An interconnect structure is formed over the encapsulant and semiconductor die. An insulating layer can be formed over the conductive layer.
Public/Granted literature
Information query
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