- Patent Title: Method and system for optimizing a core voltage level and enhancing frequency performance of individual subcomponents for reducing power consumption within a PCD
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Application No.: US14338342Application Date: 2014-07-22
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Publication No.: US09690363B2Publication Date: 2017-06-27
- Inventor: Hee Jun Park , Yiran Li , Inho Hwang , Young Hoon Kang , Joshua Hirsch Stubbs , Sean Sweeney , Robert Nicholson Gibson , Andrew James Frantz , Viswanathan Kumaragurubaran , Sumant Madhav Paranjpe
- Applicant: QUALCOMM INCORPORATED
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Smith Tempel Blaha LLC
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/26

Abstract:
A method and system for optimizing a core voltage level of a portable computing device (“PCD”) and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values for a plurality of subsystems is determined. At least one subsystem is a multiplexed subsystem. Next, a reduced set of voltage values is calculated based on the plurality of voltage values and an optimized voltage level is determined for a shared power domain. The shared power domain is subsequently set to the optimized voltage level. If the optimized voltage level is determined to exceed a required voltage level for the at least one multiplexed subsystem when it is running the plurality of processing engines, a subset of the plurality of processing engines may be identified to process a workload of the multiplexed system at a more efficient level of power consumption than the full plurality of processing engines.
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