Controlling access to a memory
Abstract:
A memory protection device for controlling access to a memory and a method of controlling access to a memory are disclosed. A memory status value held by latch circuitry in the memory protection device determines whether the memory is an enabled or a disabled state. After power-up, a power-on-reset signal causes the memory status value to indicate the enabled state. In response to the assertion from a received control signal a memory kill signal is generated by the memory protection device which causes the memory status value to switch to its disabled state and the memory status value then cannot be changed back to the enabled state without a power reset. The memory status value being in the disabled state causes enable signal generation circuitry of the memory to openly be able to generate its read enable signal and write enable signal in a disabled state, thus preventing access to the memory.
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