Embodiments relate to modulating a power supply voltage for varying a propagation delay of data paths within an integrated circuit. The power supply voltage is modulated to increase the delay of shorter data paths for reducing an incidence of hold time violations without substantially affecting the delay of longer data paths. For example, the power supply voltage is reduced from a nominal value in the first half clock cycle to increase delay of both the shorter data paths and the longer data paths. The power supply voltage is increased from the nominal value in the second half clock cycle to decrease delay of the longer data paths within the second half clock cycle such that the overall delay of the longer data paths is virtually same as when the power supply voltage is fixed at the nominal value for the entire clock cycle.