Invention Grant
- Patent Title: Bipolar junction transistors with a buried dielectric region in the active device region
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Application No.: US14747668Application Date: 2015-06-23
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Publication No.: US09722057B2Publication Date: 2017-08-01
- Inventor: Renata Camillo-Castillo , Vibhor Jain , Marwan H. Khater
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBAL FOUNDRIES Inc.
- Current Assignee: GLOBAL FOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Thompson Hine LLP
- Agent Anthony Canale
- Main IPC: H01L29/737
- IPC: H01L29/737 ; H01L21/265 ; H01L21/762 ; H01L21/764 ; H01L29/06 ; H01L29/08 ; H01L29/66

Abstract:
Device structure and fabrication methods for a bipolar junction transistor. A trench isolation region is formed that bounds an active device region along a sidewall. A dielectric region is formed that extends laterally from the sidewall of the active device region into the active device region. The dielectric region is located beneath a top surface of the active device region such that a section of the active device region is located between the top surface and the dielectric region.
Public/Granted literature
- US20160380088A1 BIPOLAR JUNCTION TRANSISTORS WITH A BURIED DIELECTRIC REGION IN THE ACTIVE DEVICE REGION Public/Granted day:2016-12-29
Information query
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