A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers, insulating layers and via conductors, and a first insulating layer formed on the first surface the substrate and covering the first conductor layer. The substrate has a cavity penetrating through the first insulating layer and substrate and exposing the build-up layer on the substrate, the via conductors include a lowermost via conductor having a bottom portion exposed at bottom of the cavity, and the bottom portion of the lowermost via conductor is recessed relative to surface of a lowermost insulating layer in the build-up layer at the bottom of the cavity.