An embodiment may include at least one server processor that may control, at least in part, server switch circuitry data and control plane processing. The at least one processor may include at least one cache memory that is capable of being involved in at least one data transfer that involves at least one component of the server. The at least one data transfer may be carried out in a manner that by-passes involvement of server system memory. The switch circuitry may be communicatively coupled to the at least one processor and to at least one node via communication links. The at least one processor may select, at least in part, at least one communication protocol to be used by the links. The switch circuitry may forward, at least in part, via at least one of the links at least one received packet. Many modifications are possible.