A serial peripheral interface of an integrated circuit includes: a first transfer pin for receiving an instruction and an address; and a clock pin for inputting a plurality of timing pulses each having a rising edge and a falling edge. After the first transfer pin receives the instruction, the integrated circuit receives the address through the first transfer pin in continuity with the receipt of the instruction. The first transfer pin receives the instruction at either of the rising edges and the falling edges of the timing pulses and receives the address at both of the rising edges and falling edges of the timing pulses.