- 专利标题： Deep trench isolations and methods of forming the same
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申请号： US14840944申请日： 2015-08-31
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公开(公告)号： US09754993B2公开(公告)日： 2017-09-05
- 发明人: Cheng-Hsien Chou , Hsiao-Hui Tseng , Chih-Yu Lai , Shih Pei Chou , Yen-Ting Chiang , Min-Ying Tsai
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L21/762
- IPC分类号： H01L21/762 ; H01L27/146 ; H01L29/06
摘要：
A method includes performing an anisotropic etching on a semiconductor substrate to form a trench. The trench has vertical sidewalls and a rounded bottom connected to the vertical sidewalls. A damage removal step is performed to remove a surface layer of the semiconductor substrate, with the surface layer exposed to the trench. The rounded bottom of the trench is etched to form a slant straight bottom surface. The trench is filled to form a trench isolation region in the trench.
公开/授权文献
- US20170062512A1 Deep Trench Isolations and Methods of Forming the Same 公开/授权日：2017-03-02
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