Invention Grant
- Patent Title: Method for cleaning via of interconnect structure of semiconductor device structure
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Application No.: US14802734Application Date: 2015-07-17
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Publication No.: US09761488B2Publication Date: 2017-09-12
- Inventor: Tai-Shin Cheng , Che-Cheng Chang , Wei-Ting Chen , Wei-Yin Shiao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/768 ; H01L21/311 ; H01L21/02 ; H01L21/027

Abstract:
A method for forming the semiconductor device structure is provided. The method includes forming a metal layer in a first dielectric layer over a substrate and forming an etch stop layer over the metal layer. The etch stop layer is made of metal-containing material. The method also includes forming a second dielectric layer over the etch stop layer and removing a portion of the second dielectric layer to expose the etch stop layer and to form a via by an etching process. The method further includes performing a plasma cleaning process on the via and the second dielectric layer, and the plasma cleaning process is performed by using a plasma including nitrogen gas (N2) and hydrogen gas (H2).
Public/Granted literature
- US20170018458A1 METHOD FOR CLEANING VIA OF INTERCONNECT STRUCTURE OF SEMICONDUCTOR DEVICE STRUCTURE Public/Granted day:2017-01-19
Information query
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