Invention Grant
- Patent Title: Interconnect structure with twin boundaries and method for forming the same
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Application No.: US14832055Application Date: 2015-08-21
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Publication No.: US09761523B2Publication Date: 2017-09-12
- Inventor: Jian-Hong Lin , Chwei-Ching Chiu , Yung-Huei Lee , Chien-Neng Liao , Yu-Lun Chueh , Tsung-Cheng Chan , Chun-Lung Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/528 ; H01L23/532 ; H01L21/288 ; H01L21/768
Abstract:
A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 μm−1 to about 250 μm−1.
Public/Granted literature
- US20170053865A1 INTERCONNECT STRUCTURE WITH TWIN BOUNDARIES AND METHOD FOR FORMING THE SAME Public/Granted day:2017-02-23
Information query
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