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    One-time programmable memory device including anti-fuse element
    1.
    发明授权
    One-time programmable memory device including anti-fuse element 有权

    公开(公告)号：US11963347B2

    公开(公告)日：2024-04-16

    申请号：US18304834

    申请日：2023-04-21

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Chiung-Ting Ou ,  Ming-Yih Wang ,  Jian-Hong Lin

    IPC: H10B20/20 ,  H01L23/48

    CPC classification number: H10B20/20 ,  H01L23/481

    Abstract: A memory device includes a transistor, an anti-fuse element, a source/drain contact, a first gate via, and a second gate via. The transistor is over a substrate. The anti-fuse element is over the substrate and is connected to the transistor in series. The source/drain contact is connected to a source/drain region of the transistor. The first gate via is connected to a first gate structure of the transistor. The first gate structure of the transistor extends along a first direction in a top view. The second gate via is connected to a second gate structure of the anti-fuse element. The second gate via is between the first gate via and the source/drain contact along the first direction in the top view.

    Semiconductor device, layout pattern and method for manufacturing an integrated circuit
    7.
    发明授权
    Semiconductor device, layout pattern and method for manufacturing an integrated circuit 有权

    公开(公告)号：US10431541B2

    公开(公告)日：2019-10-01

    申请号：US15463105

    申请日：2017-03-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Jian-Hong Lin ,  Hsin-Chun Chang ,  Hui Lee ,  Yung-Sheng Huang ,  Yung-Huei Lee

    IPC: G06F17/50 ,  H01L27/02 ,  H01L23/522 ,  H01L23/528

    Abstract: A semiconductor device for fabricating an IC is provided. The semiconductor device includes an interconnect structure and a first conductive line. The interconnect structure is made of conductive material and includes a first interconnect portion and a second interconnect portion. The second interconnect portion is connected to a first end of the first interconnect portion, and a width of the second interconnect portion is less than a width of the first interconnect portion. The first conductive line is arranged over or below the first interconnect portion and providing an electrical connection between the interconnect structure and an electrical structure. A distance between the first conductive line and the first end is less than a distance between the first conductive line and a second end of the first interconnect portion which is opposite to the first end.

    Through-circuit vias in interconnect structures
    8.
    发明授权
    Through-circuit vias in interconnect structures 有权

    公开(公告)号：US11616002B2

    公开(公告)日：2023-03-28

    申请号：US17162584

    申请日：2021-01-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Jian-Hong Lin ,  Hsin-Chun Chang ,  Ming-Hong Hsieh ,  Ming-Yih Wang ,  Yinlung Lu

    IPC: H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528

    Abstract: An integrated circuit (IC) with through-circuit vias (TCVs) and methods of forming the same are disclosed. The IC includes a semiconductor device, first and second interconnect structures disposed on first and second surfaces of the semiconductor device, respectively, first and second inter-layer dielectric (ILD) layers disposed on front and back surfaces of the substrate, respectively, and a TCV disposed within the first and second interconnect structures, the first and second ILD layers, and the substrate. The TCV is spaced apart from the semiconductor device by a portion of the substrate and portions of the first and second ILD layers. A first end of the TCV, disposed over the front surface of the substrate, is connected to a conductive line of the first interconnect structure and a second end of the TCV, disposed over the back surface of the substrate, is connected to a conductive line of the second interconnect structure.

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