- 专利标题: Pulsed control line biasing in memory
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申请号: US15371462申请日: 2016-12-07
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公开(公告)号: US09779832B1公开(公告)日: 2017-10-03
- 发明人: Muhammad Masuduzzaman , Deepanshu Dutta , Jong Yuh
- 申请人: SanDisk Technologies LLC
- 申请人地址: US TX Plano
- 专利权人: SanDisk Technologies LLC
- 当前专利权人: SanDisk Technologies LLC
- 当前专利权人地址: US TX Plano
- 代理机构: Vierra Magen Marcus LLP
- 主分类号: G11C7/10
- IPC分类号: G11C7/10 ; G11C16/34 ; G11C16/04 ; G11C16/10 ; G11C16/26 ; G11C16/16 ; G11C16/08 ; G11C7/22
摘要:
In one aspect, a voltage is provided as a rectangular waveform in which the duty cycle is varied to provide different effective voltages. These voltages may be applied to various control lines in a memory device such as a word line, bit line and/or source line, in a program, verify, read or erase operation. In some cases, the duty cycle is a function of programming data of a memory cell such as an assigned data state or a programming speed category. The duty cycle could also be a function of a programming phase or other criterion. The duty cycle can be varied by modifying the duration and separation of the pulses of the waveform or by pulse counting, in which a specified number of pulses are passed in a time period.
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