Invention Grant
- Patent Title: Memory access method, buffer scheduler and memory module
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Application No.: US14953320Application Date: 2015-11-28
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Publication No.: US09785551B2Publication Date: 2017-10-10
- Inventor: Yongbing Huang , Mingyu Chen , Licheng Chen , Zehan Cui
- Applicant: Huawei Technologies Co., Ltd.
- Applicant Address: CN Shenzhen
- Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Shenzhen
- Agency: Slater Matsil, LLP
- Priority: CN201310209787 20130530
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F13/16

Abstract:
The present invention discloses a memory access method, a buffer scheduler, and a memory module, which can support multiple application scenarios without changing the memory module or a memory chip. The method includes: receiving an operation request message for memory access data, where the operation request message includes tag information of the memory access data, operation information of the memory access data, and a memory address of the memory access data; and performing, according to at least one of the tag information of the memory access data, a memory address of the memory access data, and the operation information of the memory access data, an operation on the tag of the memory access data and/or the memory access data stored in the memory module. The present invention is applicable to the computer field.
Public/Granted literature
- US20160085670A1 Memory Access Method, Buffer Scheduler and Memory Module Public/Granted day:2016-03-24
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