- Patent Title: Validating virtual address translation by virtual machine monitor utilizing address validation structure to validate tentative guest physical address and aborting based on flag in extended page table requiring an expected guest physical address in the address validation structure
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Application No.: US14317571Application Date: 2014-06-27
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Publication No.: US09792222B2Publication Date: 2017-10-17
- Inventor: Ravi L. Sahita , Gilbert Neiger , David M. Durham , Vedvyas Shanbhogue , Michael Lemay , Ido Ouziel , Stanislav Shwartsman , Barry Huntley , Andrew V. Anderson
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/14 ; G06F9/455 ; G06F12/1009
Abstract:
Systems and methods for validating virtual address translation. An example processing system comprises: a processing core to execute a first application associated with a first privilege level and a second application associated with a second privilege level, wherein a first set of privileges associated with the first privilege level includes a second set of privileges associated with the second privilege level; and an address validation component to validate, in view of an address translation data structure maintained by the first application, a mapping of a first address defined in a first address space of the second application to a second address defined in a second address space of the second application.
Public/Granted literature
- US20150378930A1 VALIDATING VIRTUAL ADDRESS TRANSLATION Public/Granted day:2015-12-31
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