Invention Grant
- Patent Title: Semiconductor device having transistor and capacitor
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Application No.: US14935607Application Date: 2015-11-09
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Publication No.: US09793276B2Publication Date: 2017-10-17
- Inventor: Kiyoshi Kato , Shuhei Nagatsuka , Hiroki Inoue , Takanori Matsuzaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2010-024579 20100205
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L27/108 ; H01L27/1156 ; H01L27/12

Abstract:
A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased.
Public/Granted literature
- US20160064383A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-03-03
Information query
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