Invention Grant
- Patent Title: Microprocessor with secure execution mode and store key instructions
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Application No.: US14884525Application Date: 2015-10-15
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Publication No.: US09798898B2Publication Date: 2017-10-24
- Inventor: G. Glenn Henry , Terry Parks , Brent Bean , Thomas A. Crispin
- Applicant: VIA TECHNOLOGIES, INC.
- Applicant Address: TW New Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW New Taipei
- Agent Eric W. Cernyar; E. Alan Davis; James W. Huffma
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F21/72 ; G06F9/30 ; H04L9/08 ; G06F21/74 ; G06F12/0875 ; G06F21/52 ; G06F21/54 ; G06F21/60 ; G06F21/71 ; H04L9/06

Abstract:
A microprocessor conditionally grants a request to switch from a normal execution mode in which encrypted instructions cannot be executed, into a secure execution mode (SEM). Thereafter, the microprocessor executes a plurality of instructions, including a store-key instruction to write a set of one or more cryptographic key values into a secure memory of the microprocessor. After fetching an encrypted program from an instruction cache, the microprocessor decrypts the encrypted program into plaintext instructions using decryption logic within the microprocessor's instruction-processing pipeline.
Public/Granted literature
- US20160104010A1 MICROPROCESSOR WITH SECURE EXECUTION MODE AND STORE KEY INSTRUCTIONS Public/Granted day:2016-04-14
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