- 专利标题: Textured silicon liners in substrate processing systems
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申请号: US15227298申请日: 2016-08-03
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公开(公告)号: US09799492B2公开(公告)日: 2017-10-24
- 发明人: Julian Blake
- 申请人: Varian Semiconductor Equipment Associates, Inc.
- 申请人地址: US MA Gloucester
- 专利权人: Varian Semiconductor Equipment Associates, Inc.
- 当前专利权人: Varian Semiconductor Equipment Associates, Inc.
- 当前专利权人地址: US MA Gloucester
- 代理机构: Nields, Lemack & Frame, LLC
- 主分类号: H01J37/32
- IPC分类号: H01J37/32 ; H01J37/317 ; C23C14/22 ; C23C14/56 ; C23C16/44 ; C23C16/50
摘要:
Substrate processing systems, such as ion implantation systems, deposition systems and etch systems, having textured silicon liners are disclosed. The silicon liners are textured using a chemical treatment that produces small features, referred to as micropyramids, which may be less than 20 micrometers in height. Despite the fact that these micropyramids are much smaller than the textured features commonly found in graphite liners, the textured silicon is able to hold deposited coatings and resist flaking. Methods for performing preventative maintenance on these substrate processing systems are also disclosed.
公开/授权文献
- US20160343545A1 Textured Silicon Liners In Substrate Processing Systems 公开/授权日:2016-11-24
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