- 专利标题: Anti-fuse with reduced programming voltage
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申请号: US15174200申请日: 2016-06-06
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公开(公告)号: US09806084B1公开(公告)日: 2017-10-31
- 发明人: Kangguo Cheng , Juntao Li , Chengwen Pei , Geng Wang
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Tutunjian & Bitetto, P.C.
- 代理商 Jennifer R. Davis
- 主分类号: H01L21/84
- IPC分类号: H01L21/84 ; H01L23/525 ; H01L27/112 ; H01L29/161 ; H01L29/165 ; H01L29/78 ; H01L29/06
摘要:
A method for integrating transistors and anti-fuses on a device includes epitaxially growing a semiconductor layer on a substrate and masking a transistor region of the semiconductor layer. An oxide is formed on an anti-fuse region of the semiconductor layer. A semiconductor material is grown over the semiconductor layer to form an epitaxial semiconductor layer in the transistor region and a defective semiconductor layer in the anti-fuse region. Transistor devices in the transistor region and anti-fuse devices in the anti-fuse region are formed wherein the defective semiconductor layer is programmable by an applied field.
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