Invention Grant
- Patent Title: Montgomery multiplication method for performing final modular reduction without comparison operation and montgomery multiplier
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Application No.: US14672656Application Date: 2015-03-30
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Publication No.: US09811318B2Publication Date: 2017-11-07
- Inventor: Jonghoon Shin , Sun-Soo Shin , Kyoungmoon Ahn , Yong Ki Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2014-0037898 20140331
- Main IPC: G06F7/72
- IPC: G06F7/72 ; G06F7/533

Abstract:
A Montgomery multiplier includes a partial product computing unit for multiplying a multiplicand and a multiplier; a modulus reduction computing unit for performing a multiplication of a modulus and a quotient that reflects a quotient sign; an accumulation unit for accumulating in a intermediate value an output value of the partial product computing unit and an output value of the modulus reduction computing unit from a previous cycle; a quotient computing unit for receiving an accumulation value of the accumulation unit during a current cycle and calculating a quotient sign to be used during a next cycle; and a quotient sign determination unit for determining a quotient sign to be used during a next cycle from the multiplicand, the multiplier and the quotient.
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